A. Power supplies
B. Ups
C. Multilevel configuration
D. All of these
A. Line integrated stabilization network
B. Line impedance stabilization network
C. Line integrated stored network
D. Laser integrated stabilization networking
A. < latching current but greater than holding current and gate signal is 0.
B. less than holding current.
C. < latching current but greater than holding current and gate signal is present.
D. both (A) and (B).
A. Controlled transistor
B. Controlled switch
C. Amplifier with higher gain
D. Amplifier with large current gain
A. Decays as 1 / R, where R is the separation distance between the emitter and the receptor
B. Decays as R, where R is the separation distance between the emitter and the receptor
C. Decays as 1 / 2 R, where R is the separation distance between the emitter and the receptor
D. Decays as 2R, where R is the separation distance between the emitter and the receptor
A. as static conductor
B. for power control
C. for speed control of dc shunt motor
D. All of these
A. Boost single – phase power factor converter
B. A buck dc – dc converter to reduce ripple in the intermediate dc bus capacitor
C. Both A. and B.
D. None f these