Mapping the standard SOP expression , we get
Question: Mapping the standard SOP expression , we get
[A].
(A)
(B)
(C)
(D)
[A].
[B].
[C].
[D].
Answer: Option B
Explanation:
No answer description available for this question.
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Excess-3 code is known as_________________?
Excess-3 code is known as_________________?A. Weighted code
B. Cyclic redundancy code
C. Self-complementing code
D. Algebraic codeInputs A and B of the given figure are applied to a NAND gate. The output is LOW
Question: Inputs A and B of the given figure are applied to a NAND gate. The output is LOW
[A].from 0 to 6 [B].
from 0 to 2 [C].
from 0 to 1 and 2 to 3 [D].
from 1 to 2 and 3 to 4 Answer: Option C
Explanation:
NAND gate gives Low output if all inputs are High. For other combinations of inputs, output is High.
A(A + B) =
Question: A(A + B) =
[A].A [B].
A B [C].
AB [D].
AB Answer: Option C
Explanation:
No answer description available for this question.
Converting the Boolean expression LM + M(NO + PQ) to SOP form, we get ________.
Question: Converting the Boolean expression LM + M(NO + PQ) to SOP form, we get ________.
[A].LM + MNOPQ [B].
L + MNO + MPQ [C].
LM + M + NO + MPQ [D].
LM + MNO + MPQ Answer: Option D
Explanation:
No answer description available for this question.
In Boolean algebra, = A.
Question: In Boolean algebra, = A.
[A].True [B].
False Answer: Option A
Explanation:
No answer description available for this question.
Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins ?
Which type of CPLD packaging can provide maximum number of s on the package due to small size of the s ?A. PLCC
B. QFP
C. PGA
D. BGA