Field Effect Transistors – FET

A. common source configuration
B. common drain configuration
C. common gate configuration
D. none of the above

A. drain to source current
B. drain to source current with gate shorted
C. drain to source current with gate open
D. none of the above

A. 450
B. 45
C. 2.52
D. 4.5

A. 0 mA
B. ID(on)
C. maximum
D. IDSS

A. 20 mA
B. 0 mA
C. 40 mA
D. 10 mA

A. at its widest point
B. completely closed by the depletion region
C. extremely narrow
D. reverse baised

A. +4 V
B. -4 V
C. dependent on VGS
D. data insufficient

A. plate
B. cathode
C. grid
D. none of the above

A. gate and drain
B. drain and source
C. gate and source
D. input and output

A. pentode
B. tetrode
C. triode
D. diode